Mapping high level algorithms onto massively parallel reconfigurable hardware

Damaj, I. and Hawkins, J. and Abdallah, Ali E. (2003) Mapping high level algorithms onto massively parallel reconfigurable hardware. In: Computer Systems and Applications, 2003. Book of Abstracts. ACS/IEEE International Conference. IEEE Conference Publications, p. 14. ISBN 0-7803-7983-7

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Abstract

Summary form only given, as follows. We focus on implementing high level functional algorithms in reconfigurable hardware. The approach adopts the transformational programming paradigm for deriving massively parallel algorithms from functional specifications. It extends previous work by systematically generating efficient circuits and mapping them onto reconfigurable hardware. The massive parallelisation of the algorithm works by carefully composing "off the shelf" highly parallel implementations of each of the basic building blocks involved in the algorithm. These basic building blocks are a small collection of well-known higher order functions such as map, fold, and zipwith. By using function decomposition and data refinement techniques, these powerful functions are refined into highly parallel implementations described in Hoare's CSP. The CSP descriptions are very closely associated with Handle-C program fragments. Handle-C is a programming language based on C and extended by parallelism and communication primitives taken from CSP. In the final stage the circuit description is generated by compiling Handle-C programs and then mapped onto the targeted reconfigurable hardware such as the RC-1000 FPGA system from Celoxica. This approach is illustrated by a case study involving the generation of several versions of the matrix multiplication algorithm.

Item Type:	Book Section
Identification Number:	https://doi.org/10.1109/AICCSA.2003.1227451
Date:	2003
Uncontrolled Keywords:	Reconfigurable Architectures, FPGAs, Rapid Development, Handle-C, Functional Specification, CSP
Subjects:	CAH11 - computing > CAH11-01 - computing > CAH11-01-01 - computer science
Divisions:	Faculty of Computing, Engineering and the Built Environment Faculty of Computing, Engineering and the Built Environment > School of Computing and Digital Technology Faculty of Computing, Engineering and the Built Environment > School of Computing and Digital Technology > Cyber Security REF UoA Output Collections > REF2021 UoA11: Computer Science and Informatics
Depositing User:	Oana-Andreea Dumitrascu
Date Deposited:	07 Apr 2017 10:26
Last Modified:	10 Sep 2021 14:25
URI:	http://bcu-test.eprints-hosting.org/id/eprint/4220

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